Shimeng Yu, Associate Professor
School of Electrical and Computer Engineering
Georgia Institute of Technology
Talk: Neuro-Inspired Computing with Nanoelectronic Devices: Experimental Progresses and Modeling Opportunities
Abstract: Neuro-inspired computing is a new computing paradigm that emulates the neural network for intelligent information processing. To build the large-scale neuromorphic system, it is necessary to develop the compact nanoscale devices to support the synaptic and neuronal functions. In this presentation, I will discuss the recent progresses in the integration of oxide based synaptic and neuronal devices in machine/deep learning accelerators. First, I will discuss the desired characteristics of the HfO2 based resistive synaptic devices (e.g. analog multilevel states, weight tuning linearity, variation/noises) for offline training and online training, respectively. Then I will discuss the NbO2 based oscillation neuron devices to serve as the analog-to-digital converter at the edge of crossbar array for weighted sum operation. To enable the high training accuracy for online training, I will show the new direction of exploring doped HfO2 based ferroelectric transistor based synaptic cell. Lastly, I will present the challenges and opportunities of modeling synaptic and neuronal devices to the SISPAD community.
Dr. Yann-Michel Niquet
Institute for Nanosciences and Cryogenics (INAC)
CEA Grenoble, France.
Talk: Modelling Silicon CMOS devices for quantum computing
Abstract: Single spins in semiconductors have attracted a lot of interest in the prospect of storing and manipulating quantum information. Silicon is, in particular, a very attractive host for quantum bits (qubits) as it can be made free from nuclear spins (that disturb electron and hole spins) and benefits from the strong know-how of micro-electronics. Grenoble is developing a platform for spin qubits based on the silicon-on-insulator CMOS technology. The information is stored in the spin of carriers trapped in quantum dots etched in a thin silicon film on SiO2 and controlled by metal gates.
I will outline the challenges raised by the modelling of such devices (single electron/spin physics, very low temperature, …). I will describe how we have leveraged on our expertise on classical CMOS devices in order to set-up a specific infrastructure for the simulation of spin qubits in silicon. I will then illustrate the contribution from modelling in the understanding of the physics and prospects of these devices on practical cases.
Hiroshima University – Japan
Talk: Compact Modeling Perspective – Bridge to Industrial Applications
Abstract: Diversity is growing in the world with pect to many aspects. This is mostly due to the rapid technology development enabling and supporting many expectations growing in the society.
It is clear that the semiconductor community is playing an important role in this context. Due to the difficulty for real fabrications, simulation-based experiments are intensively investigated as a speed-up to achieve the targeted goals. The focus of this presentation is given on the compact-modeling methodology, required for practical connection from new device developments to the key circuits of the final product.
A compact model describes observed phenomena only on the basis of their most essential origins in analytical form as much as possible, to enable prediction of accurate circuit performances within limited simulation time. Individual compact-modeling techniques are overviewed, covering the range from simple approaches in the case of relatively mature technologies to more complete ones targeting future-type emerging technologies.